| |
| Capacity |
| PC3200/ 2700 184 Pin DDR Registered DIMM |
| Capacity |
Chip Configuration |
Chip Type |
CAS Latency |
Package |
| 256MB |
32Mx8 (x9) |
DDR SDRAM |
CL2, 2.5 |
TSOPII |
| 512MB |
32Mx8 (x18) |
DDR SDRAM |
CL2, 2.5 |
TSOPII |
| 1GB |
64Mx4 (x36) |
DDR SDRAM |
CL2, 2.5 |
TSOPII |
| 2GB |
128Mx4 (x36) |
DDR SDRAM |
CL2, 2.5 |
TSOPII |
|
| Features |
| 184 edge connector pads |
| Clock Frequency |
200/ 166/ 133 MHz |
| SSTL-2 interface |
2.5 Voltage +/- 0.2V |
| Package |
TSOPII |
|
| Specifications |
- Double Data Rate architecture
- Bandwidth(max): 2.1GB/s; 2.7GB/s; 3.2GB/s
- JEDEC standard
- 2 Banks to be operated simultaneously or independently
- Serial Presence Detect support
- Universal bus driver is designed for 2.3V to 2.7V
- MRS cycle with address key programs
* CAS latency: 2 & 2.5 (clock)
* Burst length: 2, 4 & 8
* Burst type: Sequential & Interleave
- 2 variations of refresh
* Auto refresh
* Self refresh
- Stabilization time to achieve the PLL clock driver
- Serial Presence Detect support
- Low Profile PCB available
- Minimum Propagation delay of the Address-Bus
|
| * All products specification change without notice. |
|