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SDR Unbuffered DIMM - PC166/PC133

TwinMOS SDR Unbuffered DIMM - PC166/PC133

Capacity
SDR Unbuffered DIMM - PC166/133 168 Pins
Capacity
Chip Configuration
Chip Type
CAS Latency
SPD/ECC
64MB
4Mx16 (x8)
SDRAM
CL2, 3(PC133)
SPD
64MB
8Mx8 (x8)
SDRAM
CL2, 3(PC133)
SPD
64MB
8Mx8 (x9)
SDRAM
CL2, 3(PC133)
ECC & SPD
128MB
8Mx8 (x16)
SDRAM
CL2, 3 (PC166/PC133)
SPD
128MB
16Mx8 (x8)
SDRAM
CL2, 3 (PC166/PC133)
SPD
128MB
16Mx16 (x4)
SDRAM
CL2, 3 (PC166/PC133)
SPD
128MB
8Mx8 (x18)
SDRAM
CL2, 3 (PC166/PC133)
ECC & SPD
128MB
16Mx8 (x18)
SDRAM
CL2, 3 (PC166/PC133)
ECC & SPD
128MB
16Mx8 (x9)
SDRAM
CL2, 3 (PC166/PC133)
ECC & SPD
128MB
16Mx16 (x5)
SDRAM
CL2, 3 (PC166/PC133)
ECC & SPD
256MB
16Mx8 (x16)
SDRAM
CL2, 3 (PC166/PC133)
SPD
256MB
16Mx16 (x8)
SDRAM
CL2, 3 (PC166/PC133)
SPD
256MB
16Mx8 (x18)
SDRAM
CL2, 3 (PC166/PC133)
ECC & SPD
256MB
16Mx8 (x18)
SDRAM
CL2, 3 (PC166/PC133)
ECC & SPD
512MB
32Mx8 (x16)
SDRAM
CL2, 3 (PC166/PC133)
SPD
512MB
32Mx8 (x18)
SDRAM
CL2, 3 (PC166/PC133)
ECC & SPD

Features

168 edge connector pads

Clock Frequency:

166/133 MHz

LVTTL interface:

3.3 Voltage +/- 0.3V

Package:

TSOP

Specifications
  • JEDEC standard
  • Serial Presence Detect support
  • MRS cycle with address key programs
    * CAS latency: 2, 3 (clock)
    * Burst length: 1, 2, 4, 8 & full page
    * Burst type: Sequential & Interleave
  • 2 variations of refresh
    * Auto refresh
    * Self refresh
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